| Speakers | |
|---|---|
|
Edward Nevill |
| Schedule | |
| Day | Sunday |
| Room | AW1.125 |
| Start time | 13:15 |
| End time | 13:45 |
| Duration | 00:30 |
| Info | |
| Event type | Podium |
| Track | Free Java |
| Language | English |
The ARM architecture in constrained devices such as smartphones and low end netbooks presents unique challenges for the VM writer. The ARM Optimised Interpreter delivers performance improvement of up to five times the C interpreter in the OpenJDK Zero port while maintaining smooth performance throughout. This talk looks at the techniques used and explores how they could be extended to other architectures.
The second part of the talk will look inside the Thumb2 JIT. The principle design goal of the Thumb2 JIT was to optimise time of first execution rather than peak performance. As such the design goals were to produce a JIT giving very fast compile time while generating reasonable and compact code.
The ARM architecture is typically used in constrained devices such as smartphones and low end netbooks. Typically a constrained device has
- Single, not multiple core
- Relatively fast core speed (800MHz)
- Small primary cache (32K I+D)
- Small secondary cache
- Slow memory system (typically 300nS)
- Small memory system (typically 512M)