Online / 6 & 7 February 2021


Carlos Alberto

Photo of Carlos Alberto

Carlos Alberto works as a DSP FPGA developer at Software Radio Systems (SRS).



Title Day Room Track Start End
TerosHDL, an open HDL IDE
The goal of TerosHDL is make the VHDL/SV/Verilog development easier and reliable. It is a powerful open source IDE based on VSCode
Saturday D.embedded Embedded, Mobile and Automotive 17:00 17:15