Online / 6 & 7 February 2021


Runtime Strategies and Task Scheduling of Software-Defined Radio on Heterogeneous Hardware

Is an accelerator always the best option?

Heterogeneous architectures, composed of a pool of general-purpose processors and accelerators, on one hand offers the ability to balance the application performance, programming flexibility, and energy consumption. On the other hand, they give rise to a number of challenges on a) designing and implementing a suitable architecture for the needs of the target applications, b) deploying dynamic and low-overhead resource management strategies, and c) effectively enabling execution of pipelined workflows for streaming applications. Furthermore, application developers need productive tools to port their software-defined radio applications to increasingly heterogeneous SoCs. We think that application developers should not waste their time reading datasheets or APIs for SoC-specific kernel extensions just to take full advantage of their hardware. With these in mind, this talk will discuss strategies we are using to address the aforementioned inter-related challenges through our vertically integrated compile-time and run-time environment CEDR: a Compiler-integrated, Extensible, DSSoC Runtime.

CEDR is an open-source ecosystem that runs in Linux user-space and enables compilation and development of user applications, resource management strategies, and accelerator integration in one unified framework. CEDR supports highly recurring, stream-based application graphs through pipelined execution and processing element based work queues. CEDR is built on a thread-per-PE scheduling methodology, enables integration of complex resource management heuristics that rely on work queues and require reservation-based policies. CEDR supports contemporary scheduling algorithms built on imitation learning (IL) that uses complex schedulers offline to construct an Oracle and effortlessly replicates those decisions online using machine learning models such as regression trees and neural networks. We will demonstrate CEDR deployed on the Zynq UltraScale MPSoC by conducting execution time, throughput, resource utilization analysis through dynamically arriving workload scenarios composed of Radar and WiFi applications. We will demonstrate the distinct plug-and-play integration points offered by CEDR for application engineers and hardware architects through case studies that illustrate our ability to rapidly evaluate various configurations of applications, schedulers, and accelerator IPs.


Photo of Joshua Mack Joshua Mack