AMENDMENT How to run Linux on RISC-V
with open hardware and open source FPGA tools
- Track: Hardware Enablement devroom
- Room: K.4.401
- Day: Sunday
- Start: 11:00
- End: 11:55
Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems.
I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix).
I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux.
In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
This talk is a replacement for Jasper Nuyens' cancelled "FreedomEV 2.0" talk, as Jasper decided to not attend FOSDEM20.
Speakers
 |
Drew Fustini |