Brussels / 4 & 5 February 2017


FLOSS Tools for High Level Synthesis

Integrating the FPGA into the Operating System

In this talk, we will provide a brief introduction to the State-of-the-Art of High Level Synthesis for FPGA, utterly dominated by privative & vendor specific solutions but quietly becoming mainstream as algorithm acceleration becomes a must to reach the computational power we need to move system intelligence right to the edge.

As an example of how this can be tackled from a FLOSS approach, we will provide a practical example on how to use HDLMake to merge the FPGA bitstream into the Operating System, handling everything as a single Embedded Linux runtime and providing a convenient abstraction to build & manage production grade Cyber-Physical Systems.


Photo of Javier D. Garcia-Lasheras Javier D. Garcia-Lasheras