Brussels / 4 & 5 February 2023


P4 in Nix

Bringing hardware accelerated network to the masses!

Nix, and by extension NixOS, are incredible tools to define infrastructures and deployments of dedicated machines. Unfortunately, sometimes the load is too big for even an optimized network stack and we need to get dedicated equipment such as load balancers to handle the load. What if we could configure those from within Nix?

P4, a Domain Specific Language intended to produce highly optimized network processing code, allows for that. It can produce code that can be synthesized to FPGAs or even configure network ASICs in order to have optimized solutions to those problems.

Points we'll touch on: Writing a transpiler in Nix, Automatic (re-)deployment of synthesized code, hardware definition for Nix-reprogrammable hardware.


Gauvain Roussel-Tarbouriech