Online / 5 & 6 February 2022


Luke Kenneth Casson Leighton


Title Day Room Track Start End
The Libre-SOC Project
a status update for the OpenPOWER Libre-SOC core: booting linux
Saturday D.openpower OpenPOWER 16:00 17:00
nMigen HDL
a way to create hardware in python
Sunday Libre-Open VLSI and FPGA 12:10 13:10