Brussels / 2 & 3 February 2019


The future of Supervisor Binary Interface(SBI)

Supervisor Binary Interface (SBI) is one of the most fundamental interfaces in RISC-V eco-system. It allows the operating system to interact with the supervisor execution environment (SEE). The SEE always runs in higher privileged mode than the supervisor OS. It can be a simple bootloader in low-end hardware platform, a hypervisor-provided virtual machine in a high-end server, or simply machine mode software in bare metal systems. An unchecked rapid development of many RISC-V systems could lead to incompatibilities between different systems SEE, preventing the use of a common OS binary image.

The RISC-V ISA has defined SBI to provide a cleaner interface for the supervisor OS which makes virtualization and bring-up of new hardware platforms much easier. In hypervisor extended supervisor (HS) mode, an OS or hypervisor interacts with the machine through the same SBI as an OS normally does from supervisor mode. An HS-mode hypervisor is expected to implement the SBI for its virtualized supervisor (VS) mode guest. The current RISC-V SBI only defines a few mandatory functions such as inter-processor interrupts (IPI) interface, reprogramming timer, serial console, and memory barrier instructions. Many important functionalities such as CPU/system power management are not yet defined due to difficulties in accommodating modifications without breaking backward compatibility with the current interface.

This talk presents the ongoing work to make SBI an extensible yet robust specification. The proposal to extend SBI is based on the foundation policy of RISC-V i.e. modularity and openness. It will always be backward compatible with previous versions including the existing aka legacy version. To achieve that, the focus will be only to develop a Base SBI extension that will contain feature list, version and vendor type queries. Once that is ratified, the future extension such as CPU/system power management, vendor extensions can be developed in parallel. The use cases and calling convention of these extensions will be discussed in details. We will also talk about a reference implementation i.e. OpenSBI for the SBI specification. This project will be licensed under most permissive software license which will allow everybody to reuse the OpenSBI code base in their favorite software eco-system in whatever way choose to do so. This will help in reducing SBI fragmentation in future as well.

In the spirit of the open design nature of RISC-V, the goal of this presentation is to continue the open discussion leading to the formalizing RISC-V SBI specification simplifying both hardware and software designs and doing so, contributing to further development of the RISC-V ecosystem.


Atish Patra