Brussels / 4 & 5 February 2023


Jakub Dupak

Photo of Jakub Dupak

Computer science student and teaching assistant at the Czech Technical University with an interest in compilers and computer architectures. The main author of the RISC-V port of the presented simulator and current maintainer of the project.



Title Day Room Track Start End
QtRVSim—Education from Assembly to Pipeline, Cache Performance, and C Level Programming Sunday K.4.601 RISC-V 09:40 10:20