Jean-Paul Chaput
Jean-Paul Chaput is an engineer working at Sorbonne University on ASICs physical design. He is the lead developer of the Coriolis toolchain.
Jean-Paul Chaput holds a Master Degree in MicroElectronics and Software
Engineering. He joined the LIP6 laboratory within SU (formerly UPMC) in
2000. Currently he is a Research Engineer in the Analog and Mixed Signal
Team at LIP6. His main focus is on physical level design software. He is a
key contributor in developing and maintaining the Alliance/Coriolis VLSI
CAD projects for CMOS technologies. In particular he contributed in
developing the routers of both Alliance/Coriolis and the whole Coriolis
toolchain infrastructure. He his now a key contributor in extending
Alliance/Coriolis to the Analog Mixed-Signal integration for nanometric
CMOS technologies.
Events
| Title | Day | Room | Track | Start | End |
|---|---|---|---|---|---|
| Coriolis RTL-to-GDSII Toolchain State of advancement and planned improvements |
Sunday | D.open-hardware | Libre-Open VLSI and FPGA | 10:30 | 11:20 |