D.open-hardware

Day	Start		End	Track(s)
Sunday	10:00	→	15:30	Libre-Open VLSI and FPGA

	09												10												11												12												13												14												15												16												17
Sunday													corundum From a NIC to a Platform for In-Network Compute						Coriolis RTL-to-GDSII Toolchain State of advancement and planned improvements										Bring openwifi to PYNQ-Z1 with ultra low cost						Writing GTKWave documents, with style A Python-based CSS-like mini language for generating GTKWave documents				nMigen HDL a way to create hardware in python																			Efabless Open ASICs an update from Mohamed Kassem									Using LibreSilicon How to actually use the process and scaling it

Title		Track	Start	End
Sunday
	corundum From a NIC to a Platform for In-Network Compute	Libre-Open VLSI and FPGA	10:00	10:30
	Coriolis RTL-to-GDSII Toolchain State of advancement and planned improvements	Libre-Open VLSI and FPGA	10:30	11:20
	Bring openwifi to PYNQ-Z1 with ultra low cost	Libre-Open VLSI and FPGA	11:20	11:50
	Writing GTKWave documents, with style A Python-based CSS-like mini language for generating GTKWave documents	Libre-Open VLSI and FPGA	11:50	12:10
	nMigen HDL a way to create hardware in python	Libre-Open VLSI and FPGA	12:10	13:10
	Efabless Open ASICs an update from Mohamed Kassem	Libre-Open VLSI and FPGA	13:45	14:25
	Using LibreSilicon How to actually use the process and scaling it	Libre-Open VLSI and FPGA	14:30	15:30

FOSDEM22