The talk provides an introduction to the corundum project, implementing a 100 GbE NIC based on Commercial-off-the-shelf (COTS) FPGA cards, e.g. Xilinx Alveo Cards. The project consists of all necessary RTL components, e.g. PCIe DMA engine, NIC datapath, MAC, PHY and integration of vendor specific IP cores, such as transceivers and PCIe hard-IP cores. In combination with the provided driver and debugging utility the ready-to-experiment state just requires a supported FPGA card + compiler to kick-off playing with the project.

The existing state provides the platform for future In-Network Compute platform research, allowing for application logic to be balanced across hardware acceleration and software flexibility. The platform uniquely allows for experiments with lower layer protocols, e.g. PHY layer coding.

The talk concludes with an overview about short term and mid term goals of the project.