BEGIN:VCALENDAR VERSION:2.0 PRODID:-//Pentabarf//Schedule 0.3//EN CALSCALE:GREGORIAN METHOD:PUBLISH X-WR-CALDESC;VALUE=TEXT:RISC-V X-WR-CALNAME;VALUE=TEXT:RISC-V X-WR-TIMEZONE;VALUE=TEXT:Europe/Brussels BEGIN:VEVENT METHOD:PUBLISH UID:9746@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T103000 DTEND:20260131T103500 SUMMARY:Welcome to the FOSDEM 2026 RISC-V DevRoom CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/WCSA3K-welcome_to_the_fosdem_2026_risc-v_devroom/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Björn Töpel":invalid:nomail ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Kashyap Chamarthy":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8709@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T104000 DTEND:20260131T111500 SUMMARY:RISC-V Vector optimisations in FFmpeg CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/7QTVLV-risc-v_vector_optimisations_in_ffmpeg/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Rémi Denis-Courmont":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8991@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T112000 DTEND:20260131T115500 SUMMARY:RISC-V had 40 years of history to learn from: What it gets right, and what it gets hilariously wrong CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/X8TLY9-mistakes-in-riscv/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="FelixCLC":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8851@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T120000 DTEND:20260131T123500 SUMMARY:State of the Arch: Fedora on RISC-V CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/SQGLW7-fedora-on-riscv/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Kashyap Chamarthy":invalid:nomail ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="David Abdurachmanov":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8763@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T124000 DTEND:20260131T131500 SUMMARY:The ET Minion RISC-V ISA CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/FY9GWH-et-minion-isa/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Gianluca Guida":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8235@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T132000 DTEND:20260131T135500 SUMMARY:Writing a network-capable BootROM for RISC-V prototype bring-up CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/U7KWVN-riscv-netboot/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Nick Kossifidis":invalid:nomail ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Antony Chazapis":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:9353@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T140000 DTEND:20260131T143500 SUMMARY:Upstream Embedded Linux on RISC-V SBCs: The Past, Present and Future CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/LX3NNU-upstream-embedded-linux-on-risc-v-sbcs/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Marcel Ziswiler":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8327@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T152000 DTEND:20260131T155500 SUMMARY:RISC-V Hardware Is Here. What About Software? CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/983NCX-what-about-riscv-software/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Afonso Oliveira":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:7341@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T160000 DTEND:20260131T163500 SUMMARY:Kubernetes on RISC-V: An Open Hardware Odyssey CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/VALHRG-k8s-on-riscv/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Tom Wieczorek":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:7640@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T164000 DTEND:20260131T171500 SUMMARY:How Secure Are Commercial RISC-V CPUs? CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/DL89YW-how-secure-are-commercial-risc-v-cpus/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Fabian Thomas":invalid:nomail ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Lukas Gerlach":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:9136@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T172000 DTEND:20260131T175500 SUMMARY:Can’t fork a semiconductor? Hold my beer… Introducing the Unified RISC-V IP Access Platform CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/WMVAU9-openhw-tristan-uap/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Cairo Caplan":invalid:nomail ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Charley Mann":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:8162@fosdem-2026@fosdem.org TZID:Europe-Brussels DTSTART:20260131T180000 DTEND:20260131T183500 SUMMARY:Mainline Support for OrangePi RISC-V Boards CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:RISC-V URL:https:/fosdem.org/2026/schedule/2026/schedule/event/VF9CHG-mainline-support-orangepi-riscv/ LOCATION:H.2214 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Michael Opdenacker":invalid:nomail END:VEVENT END:VCALENDAR