BEGIN:VCALENDAR VERSION:2.0 PRODID:-//Pentabarf//Schedule 0.3//EN CALSCALE:GREGORIAN METHOD:PUBLISH X-WR-CALDESC;VALUE=TEXT:LLVM Toolchain devroom X-WR-CALNAME;VALUE=TEXT:LLVM Toolchain devroom X-WR-TIMEZONE;VALUE=TEXT:Europe/Brussels BEGIN:VEVENT METHOD:PUBLISH UID:6082@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T090000 DTEND:20180204T103000 SUMMARY:Introduction to LLVM DESCRIPTION: CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/introduction/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Mike Shah":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6799@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T103500 DTEND:20180204T110500 SUMMARY:Connecting LLVM with a WCET tool DESCRIPTION:
During my master project i worked on combining LLVM with a WCET tool.
Worst-Case-Execution-Time (WCET) is the longest time a program can execute, typically measured in cycles.This information is typically of interest for code that has timing requirements such embedded systems in cars.
The project involved combining an open-source tool called SWEET with LLVM.This involves using datastructures in LLVM to output the interface-language to the tool SWEET.As a proof-of-concept, the ARM Cortex-m0 has been chosen and an attempt has been made to automatically generate a WCET analysis during compilation.
This talk will explain my findings in the project and explain the concept of WCET in general.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/wcet/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Rick Veens":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6363@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T112000 DTEND:20180204T120000 SUMMARY:Compiler-assisted Security Enhancement DESCRIPTION:This talk will be about adding features to LLVM that improve the security of the code.TWe will briefly talk about side channel attacks by focusing on information leakage due to timing behaviour and introduce the concept of 'bit-slicing' as a possible countermeasure against such kind of leakage.We'll then talk about the LADA and the SECURE projects and about my contribution: the addition to LLVM of several tools that can automatically transform sensible regions of the code into 'bit-sliced' format.We will discuss then the benefits and the limits of such transformations.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/security/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Paolo Savini":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:7047@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T120500 DTEND:20180204T124500 SUMMARY:CANCELLED Efficient use of memory by reducing size of AST dumps in cross file analysis by clang static analyzer DESCRIPTION:CANCELLED The remote presentation didn't happen.
Clang SA works well with function call within a translation unit. When execution reaches a function implemented in another TU, analyzer skips analysis of called function definition. For handling cross file bugs, the CTU analysis feature was developed (Mostly by Ericsson people)[2]. The CTU model consists of two passes. The first pass dumps AST for all translation unit, creates a function map to corresponding AST. In the second pass when TU external function is reached during the analysis, the location of the definition of that function is looked up in the function definition index and the definition is imported from the containing AST binary into the caller's context using the ASTImporter class. During the analysis, we need to store the dumped ASTs temporarily. For a large code base this can be a problem and we have seen it practically where the code analysis stops due to memory shortage. Not only in CTU analysis but also in general case clang SA analysis reducing size of ASTs can also lead to scaling of clang SA to larger code bases. We are basically using two methods:-
1) Using Outlining method[3] on the source code to find out AST that share common factors or sub trees. We throw away those ASTs that won't match any other AST, thereby reducing number of ASTs dumped in memory.
2) Tree prunning technique to keep only those parts of tree necessary for cross translation unit analysis and eliminating the rest to decrease the size of tree. Finding necessary part of tree can be done by finding the dependency path from the exploded graph where instructions dependent on the function call/execution will be present. A thing to note here is that prunning of only those branches whose no child is a function call should be done.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/ctuanalysis/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Siddharth Shankar Swain":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:7078@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T125000 DTEND:20180204T133000 SUMMARY:LLVM, Rust, and Debugging DESCRIPTION:Debugger support for Rust is good but not great. This talk will discuss the difficulties specific to Rust, and will outline a plan to modify LLVM, LLDB, and the Rust compiler to improve the Rust debugging story.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/rustdebug/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Tom Tromey":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6734@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T133500 DTEND:20180204T141500 SUMMARY:Heterogeneous Computing with D DESCRIPTION:GPU programming is popular with scientists who need massive parallel computing power. DCompute is an extension of LDC, the LLVM-based D compiler, which uses the PTX and SPIR-V targets of LLVM for a smooth integration in a system programming language.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/heterogenousd/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Kai Nacke":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6945@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T142000 DTEND:20180204T150000 SUMMARY:LLVM @RaincodeLabs DESCRIPTION:Raincode labs is the largest independent compiler company in the world, with a wide scope of products and services and more than 25 years of experience. Some of our products are based on LLVM and in this presentation I will talk about how we are currently using LLVM as well as presenting some plans on how we will use LLVM in the future. This talk is given from the point of view of users of LLVM, aiming to show which parts have been of help to us and where we have found things lacking. It aims to provide relevant information to both developers and users of LLVM.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/raincodelabs/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Johan Fabry":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6636@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T150500 DTEND:20180204T154500 SUMMARY:How to cross-compile with LLVM based tools DESCRIPTION:In theory the LLVM tools support cross-compilation out of the box, with all tools potentially containing support for all targets. In practice getting it to work is more complicated, configuration options have to be given and the missing parts of the toolchain need to be provided. In this presentation we will go through the steps needed to use an X86 linux host to cross-compile an application to run on an AArch64 target, using as many of the LLVM tools as possible. We'll cover:- Getting hold of the LLVM tools and libraries.- Providing the missing bits that LLVM doesn't provide.- The configuration options needed to make it work.- Running the application using an emulator.
This talks is primarily aimed at users of LLVM based tools on Linux, with no specific knowledge of LLVM internals required for the majority of the material.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/crosscompile/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Peter Smith":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6418@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T155000 DTEND:20180204T155500 SUMMARY:Easy::jit: just-in-time compilation for C++ DESCRIPTION:Finally! The wonders of just-in-time compilation are available in C++:runtime specialization, code derived from data structures, and many more!Easy::jit provides a simple interface over the LLVM's just-in-time compiler.No specific compiler knowledge is required!
A single function call serves as the specification for the generated code andentry point for the just-in-time compiler.The user can precisely control when the compilation is launched,do it in a separate thread if desired or cache the generated code,and manage the lifetime of the generated code.
int baz(int a, int b) { ... }
int foo(int a) {
// compile a specialized version of baz auto baz_2 = easy::jit(baz, _1, 2); // mimics std::bindreturn baz_2(a); // run !
}
The call to easy::jit
generates a mix of compiler directives and runtimelibrary calls, that are picked up by an especial LLVM pass.This pass embeds metadata and bitcode versions of the C++ code in theresulting binary.A runtime library parses the metadata and bitcode, and generates assemblycode based on the runtime library calls in the code.
This talk introduces the Easy::jit library, the approach of a compiler-assisted library,its current limitations, and tries to gather feedback from experts and potential users.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/easyjit/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Juan Manuel Martinez Caamaño":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6464@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T160000 DTEND:20180204T160500 SUMMARY:Literate Programming meets LLVM Passes DESCRIPTION:Where is the documentation of the LLVM Pass InstCombine? Is it accurate? Isthere any default example? Is it tested?
Compiler guys love generated code. So in our obfuscating compiler, we have adeclarative format to specify tons of stuff on our passes: its name, it'sapplication level, its documentation, a sample usage, its options (with defaultvalues, help string etc), but also it's priority in the pass pipeline and a fewother stuff specific to a code obfuscator. And everything is consistent, fromsphinx-generated documentation to inline help and even tests! Let's have a lookat this, and maybe influence the way it's done in LLVM.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/literate/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Serge Guelton (serge-sans-paille)":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:7070@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T161000 DTEND:20180204T161500 SUMMARY:DragonFFI DESCRIPTION:This talk will present DragonFFI, a Clang/LLVM-based library that allowscalling C functions and using C structures from any languages. It will showhow Clang and LLVM are used to make this happen, and the pros/cons againstsimilar libraries (like (c)ffi).
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/dragonffi/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Adrien Guinet":invalid:nomail END:VEVENT BEGIN:VEVENT METHOD:PUBLISH UID:6935@FOSDEM18@fosdem.org TZID:Europe-Brussels DTSTART:20180204T162000 DTEND:20180204T170000 SUMMARY:A unique processor architecture meeting LLVM IR and the IoT DESCRIPTION:A typical LLVM backend consists of complex passes lowering LLVM IR into valid and efficient machine code (MC). Complexity of the translation process originates from the inherent gap between LLVM IR and any mainstream instruction set architecture (ISA). Processors and their ISAs have been designed historically to be programmed by human assembly developers. Recent ISAs gained more complex features based on hardware considerations. To date, ISAs are designed with no respect for the IR of compilers. Hence, translation between IR and MC keeps being a complicated task.What about lifting the target machine to meet LLVM Assembly instead of lowering LLVM IR to meet an unrelated ISA? A lifted target machine can simplify backend development. One may wonder, however, what else can be gained from such an endeavor? The answers to these questions might be relevant for those who are interested in hardware architectures and likewise for those working with compiler and application development.This talk reveals how we realize a processor whose ISA is tailor-made to suit LLVM IR; what we expect from a rich ISA matching LLVM Assembly; and how we plan to utilize this technology to implement a multi-purpose architecture for IoT devices.
CLASS:PUBLIC STATUS:CONFIRMED CATEGORIES:LLVM Toolchain URL:https:/fosdem.org/2018/schedule/2018/schedule/event/uniqueprocessor/ LOCATION:K.3.401 ATTENDEE;ROLE=REQ-PARTICIPANT;CUTYPE=INDIVIDUAL;CN="Dávid Juhász":invalid:nomail END:VEVENT END:VCALENDAR